Operational amplifiers are key elements in many analog and mixed analog/digital applications. Such amplifiers are commonly required to operate at low power supply voltages where it is difficult to provide large voltage swings necessary for a wide dynamic range. In order to increase the effective voltage swing, fully differential amplifiers are used, such as the conventional amplifier 10 shown in FIG. 1.
Amplifier 10 includes a pair of differentially-connected N type MOS transistors 12A and 12B having gates which receive differential input Vin.sup.+ and Vin.sup.-, respectively. The sources of transistors 12A and 12B are connected to a common tail current source 13. The drains of transistors 12A and 12B are connected to source of N type transistors 14A and 14B, respectively. Transistors 14A and 14B have gates connected to a common bias voltage V.sub.BN. Transistors 14A and 14B are thus connected in a common gate configuration so that transistors 12A and 14A form a cascode pair and transistors 12B and 14B form a cascode pair. As is well known, the presence of transistors 14A and 14B increases the effective output impedance as seen by the load of amplifier 10.
The load of amplifier 10 is an active load which comprises P type transistors 16A and 16B, P type transistors 18A and 18B and P type transistors 20A and 20B. Transistor pair 20A and 20B have their sources connected to supply voltage V.sub.DD and their gates connected to a common bias voltage V.sub.BP1. Transistor pair 18A, 18B is connected intermediate pair 16A, 16B and pair 20A, 20B and have their gates connected to another common bias voltage V.sub.BP2. Transistor pair 16A, 16B is connected intermediate transistor pair 14A, 14B and transistor pair 18A, 18B, with the node intermediate the drains of transistors 16A and 14A forming output Vout.sup.- of the differential output. The node intermediate the drains of transistors 16B and 14B forms output Vout.sup.+ of the differential output. The gates of transistors 16A and 16B are connected to another common bias voltage V.sub.BP3.
In order to achieve the desired high gain, transistors 16A, 18A and 20A are effectively connected in series so as to increase the load impedance seen by transistor 14A. Similarly, transistors 16B, 18B and 20B are connected in series so as to increase the load impedance seen by transistor 14B. If the gain requirements are particularly high, it may be necessary to increase the number of stacked P type transistors of the active load from three to even four or more. In addition, the load transistors 16A, 16B, 18A, 18B, 20A and 20B operate in the saturation region, as opposed to the linear or triode region, so as to provide a relatively high impedance. A transistor is in saturation when the magnitude of the drain-source voltage V.sub.DS exceeds the difference between the threshold voltage of the transistor V.sub.T and the gate-source voltage V.sub.GS.
It is important that all of the transistors have a sufficiently large drain-source voltage V.sub.DS to ensure that all of the load transistors remain in the saturation mode. This requires careful selection of the absolute and relative magnitudes of the three bias voltages V.sub.BP1 V.sub.BP2 and V.sub.BP3. This also reduces the dynamic range of the output Vout.sup.+ and Vout.sup.- since the maximum output swing is limited to supply voltage V.sub.DD less 3*V.sub.SAT where V.sub.SAT is the minimum drain-source voltage necessary to maintain the transistors in saturation. The maximum voltage swing will be reduced even further if the number of load transistors is increased for the purpose of increasing the gain. This problem is exacerbated by the fact that there is a trend in reducing the size of the supply voltage V.sub.DD.
Rather than using a large number of P type loads, it has been found possible to increase the gain using gain boosting amplifiers. A further conventional differential amplifier 22 is shown in FIG. 2. Rather than using the three P type active load stages as shown in FIG. 1, two stages are used. A first inverting voltage amplifier A1 is connected between the source and gate of load transistor 16A which operates to increase the impedance of transistor 16A as seen by transistor 14A by a factor equal to the gain of amplifier A1. By way of example, if the voltage at the source of transistor 16A was to increase for some reason, the voltage increase will be amplified and inverted by amplifier A1. The output of amplifier Al connected to the gate of transistor 16A will thus drop in voltage thereby momentarily turning on transistor 16A harder so that the source of the transistor will drop in voltage, offsetting the original increase. Thus, the gate-source voltage of transistor 16A will tend to remain constant so that the current through transistor 16A will tend to remain constant. Amplifier A1 is thus a gain boosting amplifier as is amplifier A2 connected between the gate and source of transistor 16B.
Amplifier 22 of FIG. 2 provides increased dynamic range over amplifier 10 of FIG. 1 in that the output swing can be greater by one V.sub.SAT. In addition, high gain is maintained due to the presence of gain boosting amplifiers A1 and A2. However, it has been observed that differential amplifiers such as shown in FIG. 2 provide a poor transient response which is manifested by ringing present at the output.
The present invention provides a significant improvement over the previously-described amplifier circuits. The disclosed amplifier provides high gain and reduced power supply levels with a relatively wide dynamic range. Further, such performance is achieved while maintaining a good transient response. These and other advantages of the present invention will be apparent to those skilled in the art upon a reading of the following Detailed Description of the Invention together with the drawings.